A Hierarchical Register Optimization Approach

Resource Sharing in Hierarchical Synthesis

This paper presents a new approach to hierarchical high-level synthesis with respect to internal register-transfer structures of complex components. Entire subdesigns can efficiently be used as complex components at a higher hierarchical level of the design. After synthesis, the calculated schedule of each subdesign is added to its register-transfer component model. This enables the sharing of ...

Register Allocation over the Program Dependence Graph Cindy

This paper describes RAP, a Register Allocator that allocates registers over the Program Dependence Graph (PDG) representation of a program in a hierarchical manner. The PDG program representation has been used successfully for scalar optimizations, the detection and improvement of parallelism for vector machines, multiple processor machines, and machines that exhibit instruction level parallel...

A hierarchical approach for designing the downstream segment for a supply chain of petroleum production systems

Strategic decisions in a supply chain are the most important decisions for petroleum production systems. These decisions, due to high costs of transportation and storing, are costly and affected by the tactical and operational decisions in uncertain situations. In this article, we focus on designing a downstream segment for a supply chain of petroleum production systems. For this purpose, we wi...

The Design and Implementation of RAP: A PDG-Based Register Allocator

This paper describes the design and implementation of a register allocator that performs the allocation over the Program Dependence Graph (PDG) representation of a routine. The PDG representation has been used successfully as the basis for various scalar optimizations as well as for detecting and improving parallelization for vector machines, multiple processor machines, and architectures that ...

A Hierarchical Register Optimization Algorithm for Behavioral Synthesis